Planet LibreCores

Chisel v2.2.37 release

by Jim Lawson on Chisel
Chisel 2.2.37 was released on 2/23/2017. This is a maintenance release, addressing issue #740, unable to create a ROM with datawidth more than 64 bits.  

GCC Release and Binaries: 5.4.0

by OpenRISC Community on OpenRISC
We have released an updated version of the gcc 5.4.0 toolchain with x86_64 binaries for easy consumption. The new version, tagged or1k-5.4.0-20170218 is available on our github release page. There are 3 different binaries to choose from: newlib - this is the baremetal toolchain good for running c code directly on the openrisc cpu without an operating system musl - this is our main supported linux capable libc toolchain good for compiling applications to run on linux nolib - this is ...

Over The Air: LimeSDR HF, LimeSuite Updates, Hands-On Workshop, DIY Yagi, HAARP Transmissions, Star Database, and Honeywell Reverse Engineering

by Gareth Halfacree on Myriad
Over The Air is our fortnightly round-up bringing you the latest on topics of interest to the software defined radio community, as curated by technology journalist Gareth Halfacree. Users around the globe have begun experimenting with the LimeSDR v1.4 hardware, and in doing so have discovered both an issue with its reception of high-frequency (HF) bands and a fix for same – and if you’re still waiting for your own LimeSDR, you’ve got until February 21 to decide whether you want a ...

Tensilica Day Wrapup and RISC-V Event in Munich

by FOSSi Foundation on FOSSi Foundation - News & Posts
Today I visited Hanover to talk at the Tensilica Day 2017. I was invited by the Cadence Academic Network to give some insights into the state of open source processors and FOSSi. The audience was mainly academic and working on application-specific instruction-set processors (ASIP) and hence some thoughts about the open source ecosystem were welcome very much. It was an interesting event and I had some great discussions. Please find my slides here. As another great update we announce an ...

Optimising LimeSDR matching for HF

by Danny Webster on Myriad
teaser image This post is in response to comments from some of our backers who are mainly interested in working with frequencies below 100MHz. Firstly, we would like to highlight the fact that it is not possible to achieve optimum performance across the entire operating range of LimeSDR — all the way from 100kHz to 3.8GHz — with only a single matching network. Second to which we would note that the 1.2 hardware version which was shipped to our beta testing community of around 100 people, has the exact ...

FOSSi Licensing: Planned Activities

by FOSSi Foundation on FOSSi Foundation - News & Posts
The Free and Open Source Silicon Foundation aims to clarify the licensing situation for Free and Open Source Silicon (FOSSi) designs. Licensing of FOSSi is similar to that of Free and Open Source Software (FOSS), but the process of making a chip and the industry conditions vary a lot. The following assumes the reader is familiar with the basics of open source licensing, please see our introduction as reference. Similar to FOSS, there is a common source format in FOSSi: Hardware Description ...

Over The Air: LimeSuite Updates, LimeSDR 1.4, Pothos 0.4.2, IEEE Antenna Design, OsmoCon 2017, DARPA Spectrum Challenge, BLE Sniffing, FM Demodulation, and Cold-Weather Soldering Tips

by Gareth Halfacree on Myriad
Over The Air is our fortnightly round-up bringing you the latest on topics of interest to the software defined radio community, as curated by technology journalist Gareth Halfacree. It’s been a solid couple of weeks for the LimeSuite development team, with bug fixes aplenty hitting the project’s GitHub repository – including commits designed to improve the compatibility of LimeSDR hardware with high-frequency (HF) bands. LimeSuite 17.01.1, the next stable release, is set to include updated ...

2017 NetFPGA Design Challenge

by LowRISC on lowRISC
As most of you know, the majority of full-time development on lowRISC takes place at the University of Cambridge Computer Laboratory. However, we’re far from the only open source hardware activity at the University. Our colleagues on the NetFPGA project have an open source design challenge that many readers of this blog might be interested in. See the design challenge website, or read below for more details: We are pleased to announce the 2017 NetFPGA Design Challenge! NetFPGA platforms ...

Kestrel-3 leans towards mainframes, I/O channels

by Samuel A. Falvo II on Kestrel Project
Abstract Problems bringing the Kestrel-3 up on the Nexys-2 board forces me to try bringing it up on a new FPGA board instead, the icoBoard Gamma, based around the iCE40HX8K FPGA. However, the limitations of this FPGA seriously constrains the design of the computer, as the CPU just barely fits as it is. I’ve decided to brutally murder my darlings, shed all unnecessary I/O features that basically defined the Kestrel-3 as a home computer, and focus instead on pure compute and aggregate I/O ...

Outlook on 2017

by FOSSi Foundation on FOSSi Foundation - News & Posts
The first full year of the FOSSi Foundation is over and looking back on 2016 we are proud about our achievements: We have launched, our modern approach on a community portal for free and open source silicon. We organized a well attended ORCONF in Bologna with many interesting talks from a variety of projects. We got involved with the community, e.g., by giving talks at FOSDEM and FrOSCon, as the umbrella for FOSSi-related projects in Google Summer ...

We search for contributors and contractors

by FOSSi Foundation on FOSSi Foundation - News & Posts
One of our main projects is, a community portal for open source digital designs. is currently under development and needs constant improvement. We are always searching for developers that are interested to contribute to the development of From designing, to writing of documentation and code, to testing: there are opportunities to contribute from small to large, from novice to experienced programmer, writer or designer. Right now we’re ...

Over The Air: RASDR4, Pre-FOSDEM Hackfest, LimeSuite Updates and CI, LimeSDR Shipping, WaveConverter, and Norway’s FM Closure

by Gareth Halfacree on Myriad
Over The Air is our fortnightly round-up bringing you the latest on topics of interest to the software defined radio community, as curated by technology journalist Gareth Halfacree. The Society of Amateur Radio Astronomers (SARA) has announced a new revision of the Radio Astronomy Software Defined Radio (RASDR) platform, and is offering the resulting shielded LimeSDR enclosure kit to all LimeSDR owners at cost. Building on the success of previous RASDR implementations, RASDR4 was announced ...

Visualizing 3D Matrix Rotations

by Jeff on project log
teaser image The introduction to the second chapter of The Art of Electronics bemoans the traditional treatment of transistor models where “circuit behavior tends to be revealed to you as something that drops out of elaborate equations, rather than deriving from a clear understanding in your own mind as to how the circuit functions…” The chapter goes on to build both a mental model (“transistor man”) and a set of equations (Ebers-Moll) in parallel. I like this philosophy: knowing how to compute ...

FOSSi @ FOSDEM 2017: What can digital designers learn from software developers?

by FOSSi Foundation on FOSSi Foundation - News & Posts
One of my favourite conferences every year is FOSDEM in Brussels. This year I have the privilige to represent the FOSSi Foundation in the EDA Devroom, organized by our friend Javier Serrano. I’ll talk about Digital hardware design: What can we learn from software development – and what not. Join me for a look at processes and tools that make the lifes of developers, both of software and hardware, easier. What can we learn from each other? Where are different approaches needed? After the ...

Searching Waveforms

by Jeff on project log
teaser image I recently read the book “Shop Class as Soulcraft.” I enjoyed the book, but one section struck me in particular. The author, who runs a motorcycle repair shop, relates a story of a customer who brought him an 83 Honda Magna V45 motorcycle that had been sitting in storage for years and wouldn’t start. After unsuccessfully trying to talk the owner out of it, he discovered and repaired the problem that was keeping the bike from starting. But he noticed the bike also had a small oil leak. On ...

Verilator - Verilator 3.900 Released

by Wilson Snyder on Veripool: News
Verilator 3.900 2017-01-15 Internal code changes for improved compatibility and performance. Support old-style $display($time), bug467. [John Demme] With --bbox-unsup, suppress desassign and mixed edges, bug1120. [Galen Seitz] Fix parsing sensitivity with &&, bug934. [Luke Yang] Fix internal error on double-for loop unrolling, bug1044. [Jan Egil Ruud] Fix internal error on unique casez with --assert, bug1117. [Enzo Chi] Fix bad code when tracing array of ...

Lua Closure Walkthough

by Jeff on project log
In the last post I described a challenge with implementing closures that capture by reference. The Lua 5.0 VM has an interesting solution to this problem, described in section 5 of this document. The inner function always accesses free variables (which they refer to as ‘outer local variables’) indirectly through a structure called an ‘upval’ using the instructions GETUPVAL and SETUPVAL. While the enclosing function is active, the upval points to the local variable slot on the stack (though ...


by Jeff on project log
teaser image A while back, I built a Lisp machine that runs on FPGA. One feature that was lacking was support for lexical closures. I used some extra time over the recent break to add support for them. Full source code is here: Background One inspiration for this project was an MIT AI Memo that describes a machine that natively runs a dialect of Scheme, AIM 514 “Design of LISP-Based Processors or SCHEME: A Dielectric LISP or Finite Memories Considered ...

The dream of HDL standard libraries

by Olof Kindgren on Tales from Beyond the Register Map
I was recently asked why RTL code is so unportable and why there aren't any standard components to use for common blocks like RAM and ROM. As this is something that I've been thinking about for a long time, and was part of the reason why I started working on FuseSoC, I started writing a long reply, but realized it was turning into a decent-sized blog post instead, so I decided to put it here instead. So here are my thoughts on the issue, why it is an issue and some ways to make it more ...

Over The Air: DIY Downconverter, POES Tracker, Pothos and Lime Suite Updates, DARPA’s AMEBA, and Osmocom’s CFP

by Gareth Halfacree on Myriad
Over The Air is our fortnightly round-up bringing you the latest on topics of interest to the software defined radio community, as curated by technology journalist Gareth Halfacree. Engineer Raziel Einhorn is ringing in the new year with the production of a prototype open-hardware 1.5-3GHz downconverter, designed to allow lower-frequency radio hardware to receive high-frequency signals. Brought to our attention by the RTL-SDR project, Raziel’s Nigun (Melody) project is based around the ...

Discovering Memory Address Windows Without Device Trees

by Samuel A. Falvo II on Kestrel Project
Abstract Device trees are used to communicate existence of non-discoverable hardware, such as where scratchpad memory appears in the processor’s address space, to an operating system. Newer platforms, such as RISC-V, offer the opportunity to design systems in a way that obviates the need for complexities such as device trees; yet, these opportunities are often not exploited. The Kestrel-3 is designed to minimize its need for any kind of device tree-like concept through, in part, common ...

FuseSoC 1.6

by Olof Kindgren on Tales from Beyond the Register Map
Ok, so everything is done. I've done enough testing to make sure the new features work as expected and none of the old stuff is broken. The sources are just waiting to be tagged and uploaded to pypi. The blog post about the new release is written, and all I need is a catchy introduction. Oh, I know. It's christmas, so I should write something funny about FuseSoC being the best gift this year. Or wait, I take a christmas song and change some words so that it's about FuseSoC instead. Or maybe ...

Over The Air: New Site, MATLAB, LimeSDR Case, GPS, Galileo, Antennas, and Diamond Radios

by Gareth Halfacree on Myriad
Over The Air is our fortnightly round-up bringing you the latest on topics of interest to the software defined radio community, as curated by technology journalist Gareth Halfacree. The Myriad-RF website, you may have already noticed, looks a little different today. Since the project launched, its appeal has broadened from experienced wireless engineers and SDR developers to include hackers, tinkerers, HAMs, and other hobbyists. As a result, we’ve had a tidy-up in an effort to make ...


by LowRISC on lowRISC
Yesterday, lowRISC triggered a lot of discussion when someone submitted it to Hacker News. The comment thread became something of an impromptu Q+A about our project direction and status. I thought it was worth linking to it here and highlighting the discussion for a wider audience. If you have any additional questions, then feel free to comment on this blog post or else, as always, drop by our mailing list. Alex Bradbury

Over The Air: Bluetooth 5, Lime Suite Updates, CBRS, and an SDR Tuning Knob

by Gareth Halfacree on Myriad
Over The Air is our fortnightly round-up bringing you the latest on topics of interest to the software defined radio community, as curated by technology journalist Gareth Halfacree. The Bluetooth Special Interest Group (SIG) has formally launched the Bluetooth 5 standard, with the promise that the first products featuring updated radios will hit the market within the next two to six months. “Bluetooth is revolutionising how people experience the IoT,” claimed Mark Powell, executive director ...

Modular Firmware

by Samuel A. Falvo II on Kestrel Project
teaser image Abstract The Kestrel-3 computer design should be portable to a reasonable number of different FPGA development boards. However, each board offers different hardware resources, interfaces, RAM sizes, and other attributes that directly affects compatbility. Instead of building system firmware images for specific configurations of specific FPGA boards, producing a combinatorial explosion of firmware images which must be maintained and tested, it would be far simpler if we can break things ...

Fifth RISC-V Workshop: Day Two

by LowRISC on lowRISC
Today is the second day of the fifth RISC-V workshop. I’ll be keeping a semi-live blog of talks and announcements throughout the day. OpenSoC System Architect: Farzad Fatollahi-Fard Current architectures are wasteful. Only a small fraction of chip area goes to computation. For both GoblinCore and OpenHPC, ended up doing a lot of similar work to achieve only a point design. Why not make a generator to avoid repeating the same steps? OpenSoC System Architect is a combination of multiple ...

Measure Twice, Cut Once

by Jeff on project log
teaser image In a previous post, I observed that, as I increased the number of cores in my GPGPU, performance began to plateau and hardware threads spent more time stalled because their store queue was full. I speculated that the latter might cause the latter, although that wasn’t definitive. The current implementation only has a single store queue entry for each thread. One optimization I’ve been considering is adding more store queue entries, but this has subtle and complex design tradeoffs. Current ...

Fifth RISC-V Workshop: Day One

by LowRISC on lowRISC
The fifth RISC-V workshop is going on today and tomorrow at the Google’s Quad Campus in Mountain View. I’ll be keeping a semi-live blog of talks and announcements throughout the day. Introduction: Rick O’Connor and Dom Rizzo This workshop is yet again bigger than the last. 350+ attendees, 107 companies, 29 universities. The next workshop will be May 9th-10 in Shanghai, China. RISC-V at UC San Diego: Michael Taylor Startup software stacks today look a light like an iceberg. A small ...

LMS7002M Python package and VNA example

by Andrew Back on Myriad
Back in June, during the LimeSDR crowdfunding campaign, one of the many great demos that we shared details of was a basic Vector Network Analyser (VNA). Since then we’ve understandably had quite a few requests to share the code and this was always the intention, but the engineers at Lime Micro wanted to first spend some time tidying it up and putting together documentation. Well, I’m delighted to report that this has now been completed and the code can be found on GitHub. What we didn’t ...

Verilator - Verilator 3.890 Released

by Wilson Snyder on Veripool: News
Verilator 3.890 2016-11-25 Honor --output-split on coverage constructors, bug1098. [Johan Bjork] Fix various issues when making outside of the kit. Fix flex 2.6.2 bug, bug1103. [Sergey Kvachonok] Fix error on bad interface name, bug1097. [Todd Strader] Fix error on referencing variable in parent, bug1099. [Ian Thompson] Fix type parameters with low optimization, bug1101. [Stefan Wallentowitz]

Over The Air: GOES-R, LuaRadio, Spectrum Capture, and LoRa

by Gareth Halfacree on Myriad
Over The Air is our newly-launched fortnightly round-up, bringing you the latest on topics of interest to the software defined radio community as curated by technology journalist Gareth Halfacree. The US National Oceanic and Atmospheric Administration (NOAA) has successfully launched GOES-R, its most advanced weather monitoring satellite, and is proceeding to move it into its permanent geostationary orbit. “GOES-R is one of the most sophisticated Earth-observing platforms ever devised,” ...

LimeSDR LuaRadio support and Arch Linux package

by Andrew Back on Myriad
teaser image Receiving AX.25 with LuaRadio and LimeSDR LuaRadio is a lightweight, embeddable flow graph signal processing framework for SDR and as the name suggests, it is written in the Lua language. It benefits from no external hard dependencies and a binary footprint of an impressively small <750KB, which even includes the LuaJIT just-in-time compiler. In short, LuaRadio provides an environment similar to GNU Radio and that is also complete with source, sink and processing blocks — albeit without the ...

LimeSDR configuration speed optimisation

by Andrew Back on Myriad
Image: detail from LimeSDR v1.4 schematic Right from the outset the intention with LimeSDR has been to provide the very best performance and overall user experience, with a commitment to investing significant effort in engineering and striving to get the most out of the hardware platform. A good example of this is the USB 3.0 interface and this is provided by a Cypress FX3 microcontroller, which is available in many different variants. One option would have been to select a device with a ...

chisel3 announcement

by Jonathan Bachrach on Chisel
We would like to announce the preliminary SNAPSHOT release of Chisel3.  Chisel3 is the Chisel version used by the RISC-V Rocket Chip Generator and is what we will be supporting and developing moving forward.  As such, we highly encourage you all to move over to it.  In order to do so, please import chisel3._ instead of Chisel._ in your Chisel designs. See migration from Chisel2 to Chisel3 for additional guidance. We have been working very hard and long on Chisel3 and have moved over a large ...

IP-XACT: The good, the bad and the outright madness

by Olof Kindgren on Tales from Beyond the Register Map
I've found myself in a strange position recently defending IP-XACT on a number of occasions. Most recently there were some heated discussions with lots of hand gestures at orconf. The heat and hand gestures however might have been due to the fact that we were in Italy. Still, there were discussions.So let me get this straight once and for all by quoting one of the great thinkers of the 21st century. IP-XACT is in most parts horrible, but it's the best chance we have for a vendor-neutral ...

Generating a Gantt chart from HJSON input

by LowRISC on lowRISC
teaser image This blog post is a slight departure from the normal topics here. Worry not, we’ll return to discussing Verilog, Chisel, and low-level software work soon. I wrote a quick script to help serve a need (producing a Gantt chart) and thought perhaps others would find it useful. There are a wide range of online services to help produce and maintain Gantt charts, but none quite offered what I was looking for. I want something open source, easy to use, and where the underlying data is human ...

Verilator - Verilator 3.888 Released

by Wilson Snyder on Veripool: News
Verilator 3.888 2016-10-14 Support foreach, bug1078. [Xuan Guo] Add --no-decoration to remove output comments, msg2015. [Frederic Requin] If VM_PARALLEL_BUILDS=1, use OPT_FAST and OPT_SLOW. [Frederic Requin] Set VM_DEFAULT_RULES=0 for old behavior. Add error on DPI functions > 32 bits, msg1995. [Elliot Mednick] Fix SystemC compiles with VPI, bug1081. [Arthur Kahlich] Fix error on wide numbers that represent shifts, msg1991, bug1088. [Mandy Xu] Improve ...

LibreCores Student Design Contest Winner

by FOSSi Foundation on FOSSi Foundation - News &amp; Posts
This year we held the LibreCores Student Design Contest for the first time and it was a great success. We received six high quality submissions of open source silicon and its ecosystem from the last year (since October 2015). The design contest put the focus on the openness of a design, which includes aspects like (re-)usability, an easy entry and the potential to build a substantial community around it. The students had to submit their work along with answering questions that helped ...

Snap packages for LimeSDR

by Josh Blum on Myriad
teaser image Lets get snappy! Snaps are a containerization system that makes it easy to package and distribute a complete set of dependencies and files needed for an application. As an example, several snaps are now available on the LimeNet store for the Lime Suite GUI, Pothos GUI, GQRX, and GNURadio companion. In this blog, I will cover basics about creating and installing snaps, and provide instructions for using the snaps on the LimeNet store. Creating a snap Lets cover some basics for creating a ...

Digital design competition winner announced

by Andrew Back on Myriad
We’re delighted to announced that Charles Brain is the winner of the LimeSDR digital design competition, with a proposal to build an FPGA-based RF channel simulator. Channel simulators are invaluable tools for RF system designers and, like many such tools, they unfortunately come with a typically high price tag attached. Charles, G4GUO, will be known to many fellow radio amateurs for his work on projects such as DATV-Express, the digital amateur TV project. A veteran designer of advanced ...

USB Sniffer

by admin on Ultra-Embedded
Re-added details of my USB 2.0 high speed (480mbps) capable bus capture device based on the miniSpartan6+ FPGA board…. USB Sniffer

LimeSDR digital design competition

by Andrew Back on Myriad
Encouraged by the strength of proposals in the LimeSDR early access competition and keen to see what projects the community might build that make use of the FPGA, we’ve decided to run a second competition where this time the focus is putting the LimeSDR’s Altera Cyclone IV to good use. Please note that this competition is open to everyone — whether you backed the crowdfunding campaign or not! — and while we’d obviously like to see proposals for FPGA designs that would prove useful with an ...

Further Reading

by Jeff on project log
A passage from Mortimer J. Adler and Charles Van Doren’s “How to Read a Book,” discusses reading for understanding: “If the book is completely intelligible to you from start to finish, then the author and you are as two minds in the same mold. The symbols on the page merely express common understanding you had before you met. Let us take our second alternative. You do not understand the book perfectly. Let us even assume–what unhappily is not always true–that you understand enough to ...

2016.1 Release: Heart Surgery for FuseSoC and Open SoC Debug

by OpTiMSoC on OpTiMSoC
It’s OpTiMSoC release time! After a bit over half a year of work, we’re proud to announce our first release in this year, 2016.1. It comes with many great new features, but two are especially noteworthy: our switch to FuseSoC and the integration of Open SoC Debug. Both new features strengthen our collaborations with other projects – because sharing is caring! Part 1: FuseSoC Traditionally, every digital hardware project had its own build system and its own way of managing dependencies, and ...

LimeSDR competition winners announced

by Andrew Back on Myriad
The competition drew to a close last week and I have to say that judging has not been easy, on account of there being no shortage of great entries, with many more proposals for uses that we’d really love to support than boards we have available at this point in time. The first winner is Steve Conklin, who is part of the team working on the AMSAT Phase 4 ground station design. This is a fantastic initiative that we’re keen to support and were honoured that LimeSDR will play a part in its ...

FOSSi @ FrOSCon: How to design your own chip?

by FOSSi Foundation on FOSSi Foundation - News &amp; Posts
The time to get started with digital hardware development has never been better. Tools are more readily available, FPGAs get cheaper and reasonably sized boards can be obtained easily. Yet hardware development looks like a scary place to many developers coming from the software world. Sometimes it’s just naming that’s different, sometimes it’s missing documentation and being lost in choices that make it hard to dive in. At FOSSi we’re trying to spread the word about the joy of digital ...

Testing UVM Drivers, Part 2

by Tudor Timi on Verification Gentleman
teaser image In the previous post we looked at how we can emulate sequencer/driver communication using a lightweight stub of uvm_sequencer. Let's also look at some more tips and tricks I've picked up while writing unit tests for drivers. To mix things up a bit, let's look at the AXI protocol. We're not going to implement a full featured driver; instead, we'll focus on the write channels: interface vgm_axi_interface(input bit ACLK, input bit ARESETn);logic [3:0] AWID;logic [31:0] AWADDR;logic [3:0] ...

GSoC is over - Week 12 of GSoC 2016

by Elias Kouskoumvekakis on It works every time
Google Summer of Code 2016 is now over and we (the students) are asked to submit our final report which ofcourse contains a link to the "work package". The link I will place for submission is the Parallella-RISC-V Github repository which contains everything needed to build the project and use RISC-V on a Parllella board. I'm really excited as this marks the end of a 3 month journey that I had a great time working for the first time on an open-source project. I urge more people to try this ...

FuseSoC 1.5

by Olof Kindgren on Tales from Beyond the Register Map
Finally! FuseSoC 1.5 is now released. I was just about to release it a few weeks ago when I discovered two quite serious bugs. Then I was just about to release it when I had written a lengthy blog post describing some of the new backends. At that point I realized that it would be better to write those bits as part of the documentation. Yes, you read it right. Documentation. This release has 45% more documentation than previous releases. A massive increase from 245 lines to 368 lines. Oh ...

Making OSVVM a Git Submodule

by lasplund on VUnit Blog
Prior to the 0.67.0 release the OSVVM library included with VUnit was a modified copy of the original project to support GHDL. Nowadays the OSVVM project supports GHDL natively and it is also available from GitHub so we made it a submodule instead. The submodule is a way to keep another Git repository (OSVVM) in a subdirectory of the VUnit repository while keeping their histories separate. Updates to OSVVM doesn’t affect the VUnit history and vice versa. This makes no difference if ...

Parallella RISC-V project status and deliverables - Week 11 of GSoC 2016

by Elias Kouskoumvekakis on It works every time
Now that Google Summer of Code 2016 is approaching its end, the current status of the project is reported here, split on what was completed and what wasn't due to reasons that were out of our immediate control. The numbers correspond to the original proposal's milestones. As mentioned on previous blog posts, everything developed for this project can be found on the Parallella RISC-V repository. Moreover, for users that don't have a working Vivado installation or just want to test ...

Testing UVM Drivers

by Tudor Timi on Verification Gentleman
teaser image It's that time again when I've started a new project at work. Since we're going to be using some new proprietary interfaces in this chip, this calls for some new UVCs. I wouldn't even consider developing a new UVC without setting up a unit testing environment for it first. Since this is a greenfield project, a lot of the specifications are volatile, meaning that the interface protocol can change at any moment. Having tests in place can help make sure that I don't miss anything. Even if the ...

LimeSDR early access competition

by Andrew Back on Myriad
We’ve been amazed and incredibly encouraged by the achievements of those in the community who we were able to provide with early access to LimeSDR hardware; from receiving weather satellites, to running 2G and 4G cellular base stations, and even HD TV broadcasting — the uses to which it has been put in a very short period of time far exceeded our expectations. At this point boards are still in rather limited supply, but we can’t help but wonder to what other uses you might put one if ...

First batch of speakers released for orconf 2016

by FOSSi Foundation on FOSSi Foundation - News &amp; Posts
We have just released the first batch of speakers for the upcoming orconf 2016 iin Bologna, Italy on October 7-9. The presentations include new Open Source CPU implementations, formal verification tools and platforms for verification and continous integration. Abstracts for all the presentations is available at the orconf website. Stay tuned for more updates

Google Summer of Code - Update

by FOSSi Foundation on FOSSi Foundation - News &amp; Posts
We host three students this year during Google’s Summer of Code. The midterm is over and they are fastly approaching the end of the program. We want to give you a quick update about their progress here. Improving QEMU for OpenRISC Dalmon Ian works on improving the QEMU support of OpenRISC. The main item was updating the OpenRISC instruction set, testing and benchmarking so far. Dalmon works on his Github repository here in case you want to peek into the progress and test his code. ...

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Last updated 25 February 2017 02:00 UTC